Partner
Degree Discipline
Language
1 Matching Results
Results open in a new window/tab.
Results:
1 - 1 of
1
A New N-way Reconfigurable Data Cache Architecture for Embedded Systems
Performance and power consumption are most important issues while designing embedded systems. Several studies have shown that cache memory consumes about 50% of the total power in these systems. Thus, the architecture of the cache governs both performance and power usage of embedded systems. A new N-way reconfigurable data cache is proposed especially for embedded systems. This thesis explores the issues and design considerations involved in designing a reconfigurable cache. The proposed reconfigurable data cache architecture can be configured as direct-mapped, two-way, or four-way set associative using a mode selector. The module has been designed and simulated in Xilinx ISE 9.1i and ModelSim SE 6.3e using the Verilog hardware description language.
Date:
December 2009
Creator:
Bani, Ruchi Rastogi
System:
The UNT Digital Library