This problem in lieu of thesis report describes a practical photolithographic method to produce micro patterns on metal-oxide-semiconductor or metal-oxide-semiconductor-metal layers for electrical measurements. The desired patterns are then transferred from the photo mask to the photoresist-coated metal film by exposure, followed by wet etching. In the procedure described in this report, it was observed that microstructures as small as 27 mm with an edge roughness of ~ 2 mm can be reproducibly generated with this process. MOS capacitors and transistors structures can be fabricated by using this technique. The method described in this report requires access to only simple facilities so that it is relatively inexpensive, and the overall time required for the whole process is short.