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Analysis of Memory Interference in Buffered Multi-processor Systems in Presence of Hot Spots and Favorite Memories
In this thesis, a discrete Markov chain model for analyzing memory interference in multiprocessors, is presented.
Date:
August 1995
Creator:
Sen, Sanjoy Kumar
System:
The UNT Digital Library
Design and Implementation of a TRAC Processor for Fairchild F24 Computer
TRAC is a text-processing language for use with a reactive typewriter. The thesis describes the design and implementation of a TRAC processor for the Fairchild F24 computer. Chapter I introduces some text processing concepts, the TRAC operations, and the implementation procedures. Chapter II examines the history and -characteristics of the TRAC language. The next chapter specifies the TRAC syntax and primitive functions. Chapter IV covers the algorithms used by the processor. The last chapter discusses the design experience from programming the processor, examines the reactive action caused by the processor, and suggests adding external storage primitive functions for a future version of the processor.
Date:
August 1974
Creator:
Chi, Ping Ray
System:
The UNT Digital Library